The present invention relates to a high-breakdown-voltage semiconductor device.
In general, a high-breakdown-voltage semiconductor device used in a high voltage driving circuit or the like and a low-breakdown-voltage semiconductor device used in a low voltage driving circuit or the like are formed on the same substrate, constituting a power IC. Such a kind of power IC is known widely and used in various applications. Generally, at the output stage of the power IC, a high-breakdown-voltage MOSFET is used as a high-breakdown-voltage semiconductor device. The high-breakdown-voltage MOSFET requires a low ON-resistance.
FIG. 1 is a cross-sectional view of an element structure of the high-breakdown-voltage MOSFET. In the high-breakdown-voltage MOSFET, a p-type body layer 2 is selectively formed on a surface of a p-type semiconductor substrate 1 having a high resistance. An n-type source layer 3 is selectively formed in a surface of the p-type body layer 2.
An n-type offset layer 4 having a high resistance is formed in that region of the surface of the p-type semiconductor substrate 1 which differs from the region of the surface thereof in which the p-type body layer 2 is formed. A gate electrode 8 is formed on that region of the p-type body 2 which is located between the n-type source layer 3 and the n-type offset layer 4, and that region of the offset layer 4 which is adjacent to the above region of the p-type body 2, with a gate insulating film 6 and a field oxide film 7 interposed between the gate electrode 8 and the above regions of the p-type body 2 and offcet layer 4.
In the high-breakdown-voltage MOSFET, an n-type drain layer 5 is formed in a surface of an offset layer 4, and thus the offset layer 4 serves as a so-called resurf (reduced surface field) layer. The resurf layer can keep the breakdown voltage of the semiconductor device at a high value, and at the same time, restrict the ON-resistance to a low value. FIG. 2 shows drain voltage/drain current characteristic curves in relation to gate voltages VG of 0V (OFF state) to 5V with respect to the high-breakdown-voltage MOSFET.
As seen from FIG. 2, the high-breakdown-voltage MOSFET having the above structure can achieve a high breakdown voltage when the gate voltage VG is low, i.e., it is about 1V or less, and the gate is in the OFF state. However, it cannot achieve a high breakdown voltage when the gate voltage VG is more than 1V, and the gate is in the ON state.
To be more specific, in the above high-breakdown-voltage MOSFET, equipotential lines are present at a high density on the drain side in the surface of the n-type offset layer 4, and an electric field in that end portion of the n-type drain layer 5 which is opposite to the source layer 3 has a high intensity, due to a drain current flowing through the element when the gate is in the ON state. In other words, part of the positive space charge of the n-type offset layer 4 is neutralized by the charge of electrons moving through the n-type offset layer 4. Consequently, the n-type layer 4 does not act as the resurf layer, lowering the breakdown voltage. This problem becomes more remarkable when the gate voltage VG is 3V or more which is xc2xd or more of the rated gate voltage.
In such a manner, the breakdown voltage of the above high-breakdown-voltage MOSFET is low when the gate is in the ON state. Thus, the high-breakdown-voltage MOSFET cannot be used in an analog circuit in which the drain is directly connected to a power source, and the gate is biased.
When a drain current ID per 1 cm of a channel width is ID, the amount of charge of electrons is q (=1.6xc3x9710xe2x88x9219C: coulomb), and the drift speed of electrons is "ugr"drift (=8xc3x97106 cm/s), the negative charge of the n-type offset layer 4 is ID/(qxc2x7"ugr"drift)cmxe2x88x922. In addition, the gate width is a length of the gate which is measured in a direction perpendicular to the cross section of the element structure of the conventional high-breakdown-voltage MOSFET which is shown in FIG. 1. Hereinafter, it is referred to as a channel width.
The object of the present invention is to provide a high-breakdown-voltage semiconductor device which can achieve a high breakdown voltage, both when the gate is in the ON state, and when it is in the OFF state.
The first subject matter of the present invention resides in that an offset layer is formed to have a two-layer structure, i.e., it is divided into a first offset layer and a second offset layer the dosage of which is higher than that of the first offset layer, such that the first offset layer is closer to the source side than the second offset layer, and the second offset layer is closer to the drain side than the first offset layer.
The second subject matter of the present invention having the above structure resides in that, even if part of the charge of the first offset layer extending to the source side is neutralized by a drain current which flows through an element having a low resistance when the gate is in the ON state, the charge of the second offset layer closer to the drain side than the first offset layer is made to remain, and the second offset layer is made to serve as a resurf layer. By virtue of these features, the entire element achieves a low ON resistance and, simultaneously, a high breakdown voltage, both when it is in the ON state and when it is in the OFF state.
In order to attain the above object, a high-breakdown-voltage semiconductor device according to the first aspect of the present invention comprises:
a semiconductor substrate;
a body layer of a first conductivity type selectively formed on a region of a surface of the semiconductor substrate;
a source layer of a second conductivity type selectively formed in a surface of the body layer;
a first offset layer of the second conductivity type selectively formed on a region of the surface of the semiconductor substrate which differs from the region of the surface of the semiconductor substrate on which the body layer is formed;
a second offset layer of the second conductivity type formed on at least a surface region of the first offset layer;
a drain layer of the second conductivity type selectively formed in a surface of the second offset layer;
a source electrode formed to contact a surface of the body layer and a surface of the source layer;
a drain electrode formed on a surface of the drain layer;
an insulating film formed on a region of the semiconductor substrate which is located between the source electrode and the drain electrode; and
a gate electrode formed on at least that region of the body layer which is located between the source layer and the first offset layer, with the insulating film interposed between the gate electrode and the region of the body layer,
wherein when mobility of carriers in a channel of an element is xcexc[cm2 Vxe2x88x921 sxe2x88x921], a dielectric constant of the gate insulating film is xcex5[F cmxe2x88x921], a thickness of the gate insulating film is d[cm], a channel length is L[cm], a threshold voltage is VT[V], and a rated gate voltage is VG[V], a drain current ID per 1 cm of a channel width is given by:
ID=(xcexcxc2x7xcex5)xc2x7(VG/2xe2x88x92VT)/(4 Ld)
and when an amount of charge electrons is q[C], and a drift speed of carriers is "ugr"drift[cm sxe2x88x921], a dosage n2 of the second offset layer is expressed by the following formula:
n2xe2x89xa7ID/(qxc2x7"ugr"drift)[cmxe2x88x922].
In the above high-breakdown-voltage semiconductor device, the impurity concentration of the second offset layer is higher than the impurity concentration of the first offset layer.
A high-breakdown-voltage semiconductor device according to the second aspect of the present invention comprises:
a semiconductor substrate;
a body layer of a first conductivity type selectively formed on a region of a surface of the semiconductor substrate;
a source layer of a second conductivity type selectively formed in a surface of the body layer;
a first offset layer of the second conductivity type selectively formed on a region of the surface of the semiconductor substrate which differs from the region of the surface of the semiconductor substrate on which the body layer is formed;
a second offset layer of the second conductivity type formed on at least a surface portion of the first offset layer;
a drain layer of the second conductivity type selectively formed in a surface of the second offset layer;
a source electrode formed to contact a surface of the body layer and a surface of the source layer;
a drain electrode formed on a surface of the drain layer;
an insulating film formed on a region of the semiconductor substrate which is located between the source electrode and the drain electrode; and
a gate electrode formed on a region of the body layer which is located between the source layer and the first offset layer, with the insulating film interposed between the gate electrode and the region of the body layer,
wherein when a dosage of the first offset layer is n1, and a dosage of the second offset layer is n2, the following relationship is satisfied: 2n1xe2x89xa6n2xe2x89xa64n1.
It is preferable that the above dosage n1 be 1.5xc3x971012 cmxe2x88x922 or more and 4xc3x971012 cmxe2x88x922 or less.
A high-breakdown-voltage semiconductor device according to the third aspect comprises:
a semiconductor substrate;
a body layer of a first conductivity type selectively formed on a region of a surface of the semiconductor substrate;
a source layer of a second conductivity type selectively formed in a surface of the body layer;
a first offset layer of the second conductivity type selectively formed on a region of the surface of the semiconductor substrate which differs from the region of the surface of the semiconductor substrate on which the body layer is formed;
a second offset layer of the second conductivity type formed on at least a surface portion of the first offset layer;
a drain layer of the second conductivity type selectively formed in a surface of the second offset layer;
a source electrode formed to contact a surface of the body layer and a surface of the source layer;
a drain electrode formed on a surface of the drain layer;
an insulating film formed on a region of the semiconductor substrate which is located between the source electrode and the drain electrode; and
a gate electrode formed on a region of the body layer which is located between the source layer and the first offset layer, with the insulating film interposed between the gate electrode and the region of the body layer,
wherein:
the breakdown voltage of the semiconductor device is determined by a state of a depletion layer which is formed in the first offset layer when a reverse voltage is applied between the drain layer and the body layer, and a voltage of 0V is applied to the gate electrode; and
the breakdown voltage of the semiconductor device is determined by the state of a depletion layer which is formed in the second offset layer when a reverse voltage is applied between the second offset layer and the body layer, and a gate voltage having the same polarity as a drain voltage to be applied to the drain electrode is applied to the gate electrode.
In the high-breakdown-voltage semiconductor device according to the third aspect, the impurity concentration of the second offset layer is higher than an impurity concentration of the first offset layer.
According to the first to third aspect, the second offset layer contains carriers at a density corresponding to an impurity concentration of the second offset layer, even when a reverse voltage is applied between the second offset layer and the body layer, and a voltage of 0V is applied to the gate electrode.
It is preferable that the semiconductor substrate is of the second conductivity type.
However, the semiconductor substrate may be of the first conductivity type, and its impurity concentration may be lower than the impurity concentration of the first offset layer.
It is preferable that the gate electrode extend over at least a part of the surface of the first offset layer, and a thickness of a region of the insulating film which is located between the gate electrode and an end portion of the second offset layer be greater than a thickness of a region of the insulating film which is located between the gate electrode and an end portion of the first offset layer.
Note that the gate electrode may extend over a part of the surface of the second offset layer.
To summarize, in the present invention, when the gate is in the OFF state, the first offset layer functions as a resurf layer as in a conventional high-breakdown-voltage MOSFET. When the gate is in the ON state, part of the charge in the first offset layer is neutralized by a drain current flowing through the element having a low ON-resistance; however, the second offset layer the dosage n2 of which is higher than the dosage n1 of the first offset layer functions as a resurf layer. By virtue of this feature, a low ON-resistance can be achieved and, at the same time, a high breakdown voltage can be achieved, both when the gate is in the ON state and when it is in the OFF state.
According to the first aspect, the above advantageous effect can be obtained easily and reliably since the formula xe2x80x9cn2xe2x89xa7ID/(qxc2x7"ugr"drift)[cmxe2x88x922]xe2x80x9d is satisfied as mentioned above. According the second aspect, the effect can be obtained more easily and reliably since the formula xe2x80x9c2n1xe2x89xa6n2xe2x89xa64n1xe2x80x9d is satisfied.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.